Fujio Masuoka, CTO of Unisantis Electronics in Japan plans to revolutionize processing chips by giving more transistors into a smaller space and that too in 3 dimensions. If he could do so, semiconductors will give us processing chips running at ten times faster speed than that of current-generation designs.
The father of flash memories during his times in Toshiba is still mot satisfied and to wish to design 3D chip or SGT chip for which he has joined hands with Singapore’s Institute of Microelectronics to harness the government facilities and experts.
If one understands even a little about presently used 2D chips, then it won’t take much effort for him/ her to understand the phenomenon. Closer proximity for greater number of transistor will reduce the linkage time for two adjacent transistors down to an incredibly low number.
SGT will include vertical silicon pillar surrounded by memory cells, electrical contacts, and other components with lesser distance traveling for electrons bearing electrical signals. Furthermore, these chips will be cost effective as they generate less heat as compared to existing ones.
Among many announcements for similar technology that comes from microchip tycoons like Intel and IBM, this one seems progressive enough to materialize itself in the future. This marks the end of flat chips and transformation into a fastened electronic circuitry.
Via: DigitalWorldTokyo
